The present disclosure relates, in various embodiments, to thin-film transistors (TFTs) and/or other electronic devices comprising a dielectric layer. The dielectric layer is formed from a dielectric composition as described herein that includes a low surface tension additive. This allows the final dielectric layer to be thinner and smoother with fewer pinholes.
TFTs are generally composed of, on a substrate, an electrically conductive gate electrode, source and drain electrodes, an electrically insulating gate dielectric layer which separate the gate electrode from the source and drain electrodes, and a semiconducting layer which is in contact with the gate dielectric layer and bridges the source and drain electrodes. Their performance can be determined by the field effect mobility and the current on/off ratio of the overall transistor. High mobility and high on/off ratio are desired.
Organic thin-film transistors (OTFTs) can be used in applications such as radio frequency identification (RFID) tags and backplane switching circuits for displays, such as signage, readers, and liquid crystal displays, where high switching speeds and/or high density are not essential. They also have attractive mechanical properties such as being physically compact, lightweight, and flexible.
Organic thin-film transistors can be fabricated using low-cost solution-based patterning and deposition techniques, such as spin coating, solution casting, dip coating, stencil/screen printing, flexography, gravure, offset printing, ink jet-printing, micro-contact printing, and the like, or a combination of these processes. Such processes are generally simpler and more cost effective compared to the complex photolithographic processes used in fabricating silicon-based thin-film transistor circuits for electronic devices. To enable the use of these solution-based processes in fabricating thin-film transistor circuits, solution processable materials are therefore required.
In this regard, gate dielectric layers may be formed by these solution-based processes. However, the gate dielectric layer so formed should be free of pinholes and possess low surface roughness (or high surface smoothness), low leakage current, a high dielectric constant, a high breakdown voltage, adhere well to the gate electrode, be stable in solution at room temperature, and offer other functionality. It should also be compatible with semiconductor materials because the interface between the dielectric layer and the organic semiconductor layer critically affects the performance of the TFT.
It would be desirable to provide a dielectric layer that could be thin, smooth, and pinhole free. Dielectric compositions for producing the same would also be desirable.